信息网络安全 ›› 2025, Vol. 25 ›› Issue (11): 1691-1706.doi: 10.3969/j.issn.1671-1122.2025.11.004
陈春玲1,2, 路献辉1,2(
), 王睿达1,2, 白吉康1,2, 解树兵1,2
收稿日期:2025-07-25
出版日期:2025-11-10
发布日期:2025-12-02
通讯作者:
路献辉 作者简介:陈春玲(1991—),女,河南,博士研究生,主要研究方向为全同态加密|路献辉(1980—),男,河北,研究员,博士,主要研究方向为可证明安全理论、抗量子密码算法设计、同态密码算法设计、物理层安全密码算法设计|王睿达(1996—),男,河北,副研究员,博士,主要研究方向为全同态加密|白吉康(2000—),男,山东,博士研究生,主要研究方向为全同态加密|解树兵(2001—),男,山东,硕士研究生,主要研究方向为全同态加密
基金资助:
CHEN Chunling1,2, LU Xianhui1,2(
), WANG Ruida1,2, BAI Jikang1,2, XIE Shubing1,2
Received:2025-07-25
Online:2025-11-10
Published:2025-12-02
摘要:
全同态加密(FHE)作为支持在加密数据上直接计算的重要密码学技术,正逐渐成为高安全等级机密计算系统的核心支撑。其中,门自举(GBS)是实现任意深度电路评估的关键机制,其性能直接决定了 FHE 的可行性与效率。文章系统梳理了近年来门自举技术的发展脉络,重点回顾 AP、GINX和LMKC+等经典盲旋转方法及其演化路径,并分析了基于 NTRU 架构的高效变体。在此基础上,文章从噪声控制、模数与密钥切换、密钥压缩等角度总结了主流优化技术,并汇总代表性方案的参数配置与性能表现。最后,文章评述了软件与硬件加速的最新进展,特别是低延迟与高吞吐的实现路径,为门自举在机密计算等实际应用中的高效部署提供了系统性参考。
中图分类号:
陈春玲, 路献辉, 王睿达, 白吉康, 解树兵. 全同态加密中的门自举研究[J]. 信息网络安全, 2025, 25(11): 1691-1706.
CHEN Chunling, LU Xianhui, WANG Ruida, BAI Jikang, XIE Shubing. Research on Gate Bootstrapping in Fully Homomorphic Encryption[J]. Netinfo Security, 2025, 25(11): 1691-1706.
表2
代表性盲旋转方法的关键指标对比
| 方法 | 底层 结构 | 方法类型 | 参数 | 密钥分布 | #NTT/FFT | BSK/bit |
|---|---|---|---|---|---|---|
| FHEW[ | RLWE | AP | STD128[ | 三元 | & 4nN{{d}_{r}}\text{(}{{B}_{r}}- \\ & 1\text{)}l{{\log }_{2}}Q \\ \end{align}$ | |
| TFHE[ | RLWE | GINX | STD128[ | 三元 | ||
| LMKC+[ | RLWE | Automorphism | LMKC128G[ | 高斯 | ||
| Final[ | NTRU | GINX | PT128T[ | 三元 | ||
| XZD+[ | NTRU | Automorphism GINX | P128G[ P128T[ | 高斯 三元 | ||
| LLW+[ | NTRU | GINX | STD128B[ | 二元 | ||
| CXL+[ | NTRU | Automorphism | C128B2Q25[ | 二元 |
表3
不同盲旋转方法的噪声分析
| 方法 | 密钥分布 | 噪声公式 |
|---|---|---|
| AP[ | 二元 三元 | |
| GINX[ | 二元 三元 | |
| LMKC+[ | 高斯 | |
| FINAL[ | 三元 | |
| XZD+[ | 高斯 三元 | |
| LLW+[ | 二元 |
表4
FHEW-Like门自举参数配置
| 参数 | Key Distr. | |||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CSTD128B | 128 | 二元 | 571 | 211 | 1024 | 225 | 214 | 27 | 2 | 214 | 1 | 2-40.7 |
| CSTD128B1 | 128 | 二元 | 532 | 211 | 1024 | 225 | 213 | 27 | 2 | 213 | 1 | 2-28.2 |
| CSTD128T | 128 | 二元 | 512 | 211 | 1024 | 227 | 214 | 29 | 2 | 214 | 1 | 2-63 |
| CSTD128G | 128 | 高斯 | 458 | 211 | 1024 | 228 | 213 | 29 | 2 | 213 | 1 | 2-52 |
表5
基于NTRU的门自举参数配置
| 参数 | NTRU | LWE | FR | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Key Distr. | n | q | Key | |||||||||||||
| C128B2Q25 | 128 | 1024 | 225 | 高斯 | 3.5 | 532 | 211 | 二元 | 3.19 | 28 | 4 | 2 | 213 | 213 | 1 | 2-47 |
| C128G2Q25 | 128 | 1024 | 225 | 高斯 | 3.5 | 465 | 211 | 高斯 | 3.19 | 28 | 4 | 2 | 214 | 214 | 1 | 2-59 |
表8
不同门自举硬件实现方案对比
| 方案 | 解密 失败率 | 平台 | 资源消耗 (ASIC:mm2/FPGA:LUT/FF/DSP) | 延迟 / | 吞吐率 /BS/s |
|---|---|---|---|---|---|
| FPT[ | 2-15 | FPGA | 595K / 1024K / 5980 | 6600 | 28400 |
| NFP[ | 2-31 | FPGA | 891K / 217K / 4508 | 920 | — |
| 2-15 | 891K / 217K / 4508 | 290 | |||
| Matcha[ | — | ASIC | 36.96 mm2 @??nm PTM | 200 | 10000 |
| Strix[ | — | ASIC | 141.37 mm2 @28nm TSMC | 440 | 21104 |
| Morphling[ | — | ASIC | 74.79 mm2 @28nm TSMC | 160 | 98933 |
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